The invention relates generally to automatic test equipment and more particularly a timing measurement unit and method for collecting timing information.
Automatic test equipment allows semiconductor device manufacturers to test, in volume, the functionality of each device sold in the marketplace. The equipment, often referred to as a tester, generally drives signals to and detects signals from a device-under-test (DUT), and evaluates the detected results to expected values.
Modern semiconductor devices often have between hundreds to thousands of pins that receive and send a variety of input/output signals. Consequently, one of the basic challenges confronting a tester involves synchronizing the application or detection of signals from a plurality of DUT pins at relatively precise timings. Synchronizing high-speed test signals often requires some form of calibration technique to compensate for a variety of signal degrading factors associated with each tester channel. Two of the more common methods of performing timing calibration include time-domain-reflectometry (TDR) and vernier linearity calibration.
Conventional TDR techniques generally involve determining a transmission line length, and predicting the signal delay caused by the line. The length is often calculated by driving a pulse down the open-ended line, detecting the reflection, and measuring the relative timings between the two events. A more thorough explanation of the conventional technique is found in U.S. Pat. No. 5,321,632, to Otsuji.
Vernier linearity calibration refers to characterizing the actual edge timings of a timing vernier in response to predefined delay settings. Conventionally, this was done one channel at a time using a large control matrix of relays, ECL gates, etc., and centrally controlled by mainframe-resident hardware. During the characterizing process, data results for each channel were fed back to the hardware one-by-one. While such a technique works well for its intended applications, the dramatic rise in device pin counts (and tester channel counts) renders such a sequential methodology undesirable in terms of calibration process time and reliability.
What is needed and heretofore unavailable is a timing measurement unit and method for carrying out timing measurements quickly and accurately. The walking strobe calibration apparatus and method satisfies these needs.
The timing measurement unit and associated methods of the present invention provide high accuracy tester timing data acquisition and processing especially useful for calibration applications to minimize calibration process time. This correspondingly results in higher tester accuracy, higher tester performance and lower test costs for semiconductor manufacturers.
To realize the foregoing advantages, the invention in one form comprises automatic test equipment for testing a semiconductor device and including a computer workstation and pin electronics circuitry coupled between the semiconductor device and the computer. The pin electronics circuitry includes a plurality of channels, each channel having timing circuitry operative in response to desired programmed timing information, driver/comparator circuitry coupled to the timing circuitry for driving test waveforms at a period T, and sampling data from the waveforms at a beat period T +/xe2x88x92xcex94t, and a timing measurement unit. The timing measurement unit is coupled to the driver/comparator circuitry for measuring the relative timings of the sampled data. The plurality of channels cooperate to produce substantially real-time timing measurement data in parallel.
In another form, the invention comprises a real-time results processor for implementation in a semiconductor tester pin electronics channel for detecting actual timing data relating to test waveforms having a period T generated by a semiconductor tester. The real-time results processor includes input circuitry having a clock input for receiving a stream of data values sampled from the test waveforms at the beat period. The processor also includes a data filter coupled to the input circuitry and having logic responsive to preprogrammed criteria to extract data indicative of a timing event. A counter operative to count the data values and generate a count representative of the timing of the extracted timing event data with respect to a predetermined reference count. Storage circuitry stores the count.
In yet another form, the invention comprises a method of determining the length of a transmission line. The method includes the steps of first driving a periodic waveform of a predetermined magnitude along the transmission line at a predetermined period (T) to generate a periodic sequence of incidence edges and reflected edges. A comparator detection threshold is then set at a specified level to detect the incidence edges. The waveform is strobed, or sampled, at a strobe period (T +/xe2x88x92xcex94t). The strobe period and the waveform period cooperate to define a beat period. A timing reference point is then established on the waveform. Once the timing reference point is established, one of the incidence edges is detected at an incidence edge detection point in a first search. A count of the number of strobes from the timing reference point to the incidence edge detection point is recorded. To maintain the timing reference point, the count is reset at the beat period rate. The method continues by detecting the reflected edge in a subsequent search and recording a count of the number of strobes from the timing reference point to the reflected edge detection point. Once the count for the reflected edge is made, the method concludes by evaluating the relative counts between the incidence edge detection point and the reflected edge detection point to determine the length of the transmission line.